A wafer in your hand
Hold a finished 300 mm silicon wafer up to a fluorescent light and you see a grey mirror, featureless to the eye. Look at a cross-section under a transmission electron microscope and the picture changes entirely: dozens of distinct materials arranged in layers thinner than a virus, each chosen because nothing else does exactly that job at that scale. The silicon is the scaffolding. Everything else — the gate dielectrics, the barrier metals, the low-k dielectrics, the contact fills, the interconnect liners — is a materials library that spans roughly two-thirds of the periodic table.
Silicon first, but silicon is not simple
The starting point is metallurgical-grade silicon, reduced from quartz in an arc furnace. That material is useful for making steel and aluminium alloys, but it is nowhere near pure enough for electronics. It must be converted to trichlorosilane, distilled repeatedly, and then decomposed in a Siemens reactor to grow polysilicon rods. That polysilicon is then melted and pulled into a single crystal — the Czochralski process — and sliced into wafers. The entire sequence is designed to push impurity concentrations below parts per trillion for certain dopants. To put that in perspective: an illustrative analogy would be finding a single misplaced grain in several Olympic swimming pools filled with sand.
Even then, silicon alone does not make a transistor. Controlled amounts of boron or phosphorus are implanted as dopants to define the p-type and n-type regions that give the device its switching behaviour. The concentration of these dopants is measured in parts per million or below, and their placement is accurate to fractions of a nanometre.
The gate stack: where exotic elements earn their place
For decades the gate insulator was silicon dioxide — simple, reliable, grown by heating the wafer in oxygen. As transistors shrank, the oxide layer became so thin that electrons tunnelled straight through it, wasting power and generating heat. The industry's answer was to replace silicon dioxide with high-k dielectrics: hafnium oxide and hafnium silicate are now standard in leading-edge nodes. Hafnium is a relatively obscure element, separated from zirconium with considerable difficulty because the two are chemically almost identical.
The gate electrode above that dielectric was once polysilicon. It is now a metal — typically a titanium nitride or tantalum nitride layer, sometimes with a tungsten fill — because metal gates suppress a quantum mechanical effect called Fermi-level pinning that would otherwise shift the transistor's threshold voltage unpredictably. Each of those metals arrives at the fab as a high-purity sputtering target or as a precursor gas for chemical vapour deposition.
Interconnects: copper, cobalt and the barrier problem
Once the transistors exist, they must be wired together. From the late 1990s onward the industry moved from aluminium interconnects to copper, which conducts electricity better and allows faster signalling at lower power. Copper is deposited by electroplating into etched trenches in a low-k dielectric — a porous silica-like material engineered to reduce capacitance between adjacent wires.
Copper diffuses readily into silicon and kills transistors. A barrier layer — tantalum, tantalum nitride, or at the finest dimensions cobalt or ruthenium — lines every trench before the copper goes in. These liner metals are deposited in layers that may be only a few atoms thick. Cobalt has grown in importance at advanced nodes partly because it adheres well to copper and maintains conductivity at very narrow linewidths where other barriers begin to degrade.
To make the arithmetic concrete: suppose, illustratively, that a single leading-edge chip contains interconnect metal totalling a few hundred milligrams across all layers. The barrier liner might represent only a few percent of that mass. At wafer scale, with hundreds of chips per wafer and thousands of wafers per month, even a metal used in trace quantities per chip accumulates into meaningful consumption at the fab level — enough that supply disruptions to a specialty refiner matter to a chipmaker's production schedule.
The supporting cast: rare earths, specialty gases and polishing slurries
Chemical mechanical planarisation — the step that flattens each layer before the next is deposited — uses slurries containing cerium oxide abrasive particles. Cerium is a rare earth element, produced in relatively few countries. The photolithography process that prints circuit patterns uses light sources, optics, and photoresists that themselves depend on fluorine chemistry, cobalt-containing hardeners, and tin plasma in the case of extreme ultraviolet tools.
The specialty gases that flow through a fab — tungsten hexafluoride, silane, nitrogen trifluoride, germane, arsine, phosphine — each have their own supply chains, often routed through a small number of qualified producers. Germanium, used in strained silicon layers and in some compound semiconductor applications, arrives as a byproduct of zinc smelting. Indium, used in indium phosphide and indium gallium arsenide devices for radio-frequency and photonic chips, is a byproduct of zinc and lead refining. Neither element has a primary mine.
Purity as an engineering variable
Across all these materials, purity is not a fixed requirement — it is a specification that tightens with each process node. A sputtering target that was acceptable at one linewidth generation may introduce too many defects at the next. The convention of describing purity in a sequence of nines — 99.999% is called five-nines, or 5N — understates how much harder it becomes to remove each additional nine. Moving from 4N to 5N material typically requires a fundamentally different refining route, not simply more passes through the same process.
This is why a materials shortage that sounds marginal in tonnage terms can be acutely felt in semiconductor manufacturing. The volume of hafnium or ruthenium consumed globally is small by any mining standard. The specifications that volume must meet are not.
Where to go next
Readers wanting to move beyond this overview should look at the process integration literature — particularly the work coming from imec and from the conference proceedings of the International Electron Devices Meeting — where the materials choices for gate-all-around transistors and backside power delivery are examined in precise electrochemical and crystallographic terms. The Materials Atlas entries on hafnium, cobalt, ruthenium, and cerium cover the upstream supply chains that feed the specifications described here.